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Product Overview

CS1262 is an analog front end (AFE) for photovascular volumetric map (PPG) signal acquisition. It can also be used for optical biosensing applications such as heart rate monitoring (HRM) and peripheral capillary oxygen saturation (SpO2) measurements. The PPG signal chain supports up to eight switchable light emitting diodes (LEDs) and up to four photodiodes (PDs).The LEDs can be turned on using a fully integrated LED driver. The photodiode currents are converted to voltages by a mutual impedance amplifier (TIA) and digitized using an analog-to-digital converter (ADC). The ADC code from the PPG phase can be stored in an 800-sample first-in-first-out (FIFO) block and read using the SPI.

PPG transmitter
Supports 8-way common anode LED configuration
Supports 2 independent LED driver units
Maximum current of each LED drive unit is 25 mA, 50 mA, 100 mA, and 125 mA, adjustable in four gears
Two LED driver units can drive a maximum current of 250 mA
Uses 8-bit register to fine tune each LED current
LED turn-on time adjustable
Two common anode LED modes are lit in parallel, and the current of each LED can be set separately.
PPG Receiver
Supports 4 PD inputs; the 4 PDs can be sampled simultaneously
Embedded 4 x 22-bit high-precision ADCs
DC offset reduction DAC for TIA input
Supports digital ambient light reduction on ADC output
Noise filter with programmable bandwidth
Transimpedance gain: 10 kΩ to 1 MΩ
Up to 110 dB dynamic range
Sampling frequency 100 Hz, ambient light cancellation on, 1 RX active channel operation, AFE power consumption 54 uA
Flexible pulse sequencing and timing control
PRF: Pulse repetition frequency: 1 Hz to 1000 Hz
Each pulse cycle can support up to 36 phases, including 12 LED phases and 24 ambient light phases
Each pulse cycle can support up to 48 effective receiving channels
System Clock
External clock: Supports external 32 K~2 MHz input clock and 32.768 kHz clock
Internal clock: supports 32 K/128 kHz internal clock
Internal clock: 4 MHz ADC dedicated clock
SPI interface
SPI: Supports up to 10 MHz
800 depth FIFO
Supports FIFO_RDY interrupt
FIFO_RDY interrupt supports retransmission mechanism, with configurable retransmission cycle software
FIFO supports FIFO data skipping and jumping back functions
Interrupt source: THR_DET_RDY wear detection interrupt—can be used for wear detection wake-up
FIFO_RDY interrupt—generates interrupt when the number of FIFO storage exceeds the configuration threshold
DATA_RDY interrupt—generated after completing a PRF conversion
TS_RDY interrupt— generates an interrupt when the temperature sensor detection exceeds or is lower than the configured threshold
REG_ERROR interrupt—generates an interrupt when the PRF cycle, light-up time, TX current three configuration registers and its corresponding parity do not match, after the PRF cycle begins
LED_WARN interrupt—generated when the LED DRIVE integral value is greater than the configured value
FIFO RDY interrupt supports retransmission mechanism, 1 ms–256 ms can be assigned
All interrupt sources share one interrupt.
Operating Temperature Range
-30 °C to 85 °C
Power Supply
VDD_RX: 2.4 V to 3.6 V
VDD_TX: 2.4 V to 3.6 V, can be combined with VDD_RX
VDD_IO: 1.7 V to min(VDD_RX, 3.6 V)
WLCSP42: 2.96 mm*2.65 mm*0.5 mm
Application Scenario
Supports wearable market PPG heart rate measurement
Heart rate variability analysis (HRV)
Pulsed oximetry (SpO2) measurement
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Design and development
CSWrite V3.2.4
CSWriterUx V3.2.4 is the latest burning tool software of Core Sea Technology. Support core sea 8bit MCU, 32bit MCU.
Core sea 8-bit MCU/SOC integrated development environment 1. Integrated C compiler, assembler, linker, debugger 2. Support standard C language and assembly language development 3 Example code of integrated chips
Sample Application
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