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CPW3101
A microcontroller that integrates the UFCS protocol

CPW3101 is a microcontroller compliant with the UFCS protocol. The maximum frequency is 24 MHz. It has a built-in 32KB Flash and a 2KB SRAM and supports peripherals, such as UART, I2C, and timer. Furthermore, it features high integration, interference immunity, and reliability. Its operating temperature ranges from -40 °C to 85 °C and its operating voltage ranges from 2.2 V to 5.5 V. The chip supports multiple low-power modes to meet different applications.


Main frequency
- Max operating frequency 24MHz
Memory
- 32Kbytes Flash memory
- 2Kbytes SRAM
Clock module
- Internal 24MHz RC oscillator (HRC), ±1%@25℃, 3.3V, full-temperature clock accuracy ±3%
- Internal 40kHz RC oscillator (LRC), with the accuracy of ±10% in a typical case
Operating environment
- VDD voltage: 2.2 to 5.5V
- Temperature range: -40 to 85℃
Power management
- Low-power mode: sleep, deep sleep mode 1, deep sleep mode 2
- Support POR (power-on reset)/PDR (power-down reset)
General-purpose input/output port (I/O)
- 6 inputs and outputs (I/O)
- All I/O mapped external interrupt vectors
- UART communication pin supports 6V withstand voltage
- nRST/external interrupt (output)/I2C port supports 1.8V/1.2V input
- nRST low-level reset, no pull up inside, external pull-up resistor to be connected
- UART supports VDD communication level
Timer
- 1 × general-purpose 16-bit timer, supporting the capture function
PWM output
- 1 × low-power timer
- 1 × independent watchdog timer (FWDT): 8-bit preset
and 12-bit self-decrement counter
- 1 × system timer: 24-bit self-decrement counter
Low power consumption feature
- <10uA deep sleep mode @3.3V, 25℃
Encapsulation
- WLCSP8
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Technical Documentation
Product manual(1)
Design and development
Tools/Software
CSWrite V3.3.1
1. Modify the chip of CS8M322 2. CSU38F20 realizes live burning 3. New model: CS32A019 CS32F06X CSU32PB17 A3168 CS32A019 CST92F40KEV7ER CST92F40KCV6NR 4. Fix CS32L0102.3V verification failure issue and verification failure result failure issue 5. Set 12P82 not to write 0 in special addresses (0x07C8~0x07F7) 6. Modify the ID naming convention for CS32F03x-RA 7. 18MB86 implements erasure function, with erasure range including code area and eeprom area 8. CS32G020 Implementation of Offline Burner with Readable Checksum Value 9. CS32L010 Release Page Erase Function 10. Implement erasure function for 18MB86 11. F03X-RA, CS32A010, and CS32F06X add margin read0 verification
CSU-IDE V6.0.3
chipsea8-bit MCU/SOC integrated development environment 1. Integrate C compiler, assembler, linker, debugger 2. Support standard C language and assembly language development 3. Integrate the chip sample code
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