CSWrite V3.3.3
1. New models: CS8P322, CS32G053, CS32G023
2, CST92F42 burning BUG fix
3. Fixed the "after the expiration date" pop-up window problem.
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CDS8703
Chipsea CDS8703 is a high-performance analog SoC that integrates a high-precision 24-bit Σ-Δ analog-to-digital converter (ADC) and a 32-bit ARM® Cortex®-M0 core.
Chipsea CDS8703 is a high-performance analog SoC that integrates a high-precision 24-bit Σ-Δ analog-to-digital converter (ADC) and a 32-bit ARM® Cortex®-M0 core. For its built-in high-performance and low-noise Σ-Δ ADC, the data conversion rate can reach up to 4KSPS, and the gain range of the low-noise programmable gain amplifier (PGA) is 1~128. Combined with the multiplexer, the chip can flexibly support up to three differential inputs or six single-ended inputs, which is very suitable for detection of tiny signals. The 32-bit ARM® Cortex®-M0 core integrated by CDS8703 has an operating frequency up to 24MHz and is equipped with a single-instruction-cycle 32-bit hardware multiplier, significantly improving processing capacity. The chip has built-in 32KB Flash memory, 6K system memory and 4K SRAM, providing users with ample storage space.
1 × 24-bit high-precision ADC
- Output rate, support up to 4KSPS
- Support single cycle setup
- Built-in SINC2 and SINC3 filters
- Support 2 groups of differential input or 4 single-ended input
- Support 1x/2x/4x/8x/16x/32x/64x/128x programmable gain
- Support single cycle setup
- Built-in SINC2 and SINC3 filters
- Support 2 groups of differential input or 4 single-ended input
- Support 1x/2x/4x/8x/16x/32x/64x/128x programmable gain
Voltage source output (VEXC)
- 1 output channel
- 0.5VDD/1.2V output/0.5VREF available
- 0.5VDD/1.2V output/0.5VREF available
Core: 32-bit ARM® Cortex® -M0
- Max operating frequency 24 MHz
- Single-instruction cycle 32-bit hardware multiplier
- Single-instruction cycle 32-bit hardware multiplier
Memory
- 32K Bytes Flash memory
- 6K Bytes system memory
- 4K Bytes SRAM, with hardware parity check
- 6K Bytes system memory
- 4K Bytes SRAM, with hardware parity check
Power management
- Low-power mode: Sleep, deep sleep and power-down mode
- Support POR (power-on reset)/ PDR (power-down reset)
- Support low voltage detection (LVD)
- Support POR (power-on reset)/ PDR (power-down reset)
- Support low voltage detection (LVD)
Timer
- 1 × 16bit general-purpose timer (TIM14) - 1 × 16-bit low-power timer (LPTIM), support wake-up - 1 × independent watchdog timer (FWDT)
- 1 × window watchdog timer (WWDT)
- 1 × 24-bit self-decrement system timer
- 1 × window watchdog timer (WWDT)
- 1 × 24-bit self-decrement system timer
Communication interface
- 1 × I2C interface, support master/ slave mode
- 1 × SPI interface, support master/ slave mode
- 1 × USART interface
- 1 × SPI interface, support master/ slave mode
- 1 × USART interface
Operating environment
- DVDD/AVDD voltage: 2.0~5.5V
- Ambient temperature: -40~105℃
- Ambient temperature: -40~105℃
Encapsulation
- QFN32
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Technical Documentation
Product manual(1)
Design and development
Tools/Software
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CSU-IDE
Core sea 8-bit MCU/SOC integrated development environment
1. Integrated C compiler, assembler, linker, debugger
2. Support standard C language and assembly language development 3 Example code of integrated chips